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authorthajohns <thajohns@clarkson.edu>2021-09-09 01:15:22 -0400
committerGraham Northup <grahamnorthup@yahoo.com>2021-09-10 04:05:55 -0400
commitd6e399973e9bc6447a28b80cacffcbc6a768f1ed (patch)
tree772939eb5d49bdb6ee8e5d632f2224867f6e817d /src/synth/rel.rs
parentee11b17c0e2796bd3d843a8a516c12453af75927 (diff)
got pre-linking steps working, removed glob includes
Diffstat (limited to 'src/synth/rel.rs')
-rw-r--r--src/synth/rel.rs39
1 files changed, 23 insertions, 16 deletions
diff --git a/src/synth/rel.rs b/src/synth/rel.rs
index d2fbb70..93b0cd1 100644
--- a/src/synth/rel.rs
+++ b/src/synth/rel.rs
@@ -1,5 +1,8 @@
+use super::{
+ FactoryParameters, GenBox, GenFactoryError, Generator, GeneratorFactory, ParamKind, ParamValue,
+ Parameters, Rate, SampleBuffer,
+};
use std::{cmp, mem};
-use super::*;
#[derive(Debug)]
pub enum RelOp {
@@ -97,28 +100,32 @@ impl Generator for Rel {
0.0
};
}
- },
+ }
Rate::Control => {
let val = left_buf.first();
let thres = right_buf.first();
- self.buf.set(if match self.op {
- RelOp::Greater => val > thres,
- RelOp::GreaterEqual => val >= thres,
- RelOp::Equal => val == thres,
- RelOp::NotEqual => val != thres,
- RelOp::LessEqual => val <= thres,
- RelOp::Less => val < thres,
- } {
- 1.0
- } else {
- 0.0
- });
- },
+ self.buf.set(
+ if match self.op {
+ RelOp::Greater => val > thres,
+ RelOp::GreaterEqual => val >= thres,
+ RelOp::Equal => val == thres,
+ RelOp::NotEqual => val != thres,
+ RelOp::LessEqual => val <= thres,
+ RelOp::Less => val < thres,
+ } {
+ 1.0
+ } else {
+ 0.0
+ },
+ );
+ }
}
&self.buf
}
- fn buffer(&self) -> &SampleBuffer { &self.buf }
+ fn buffer(&self) -> &SampleBuffer {
+ &self.buf
+ }
fn set_buffer(&mut self, buf: SampleBuffer) -> SampleBuffer {
mem::replace(&mut self.buf, buf)
}